1. Field of the Invention
The present invention relates to a synchronization (sync) obtaining apparatus using periodically repeated signal patterns and a method thereof.
2. Description of the Related Art
In a communication system, a transmitter transmits a sync signal to a receiver, and the receiver performs a synchronization using the sync signal.
Recently, for a high-rate data transmission, a communication system that adopts an OFDMA (Orthogonal Frequency Division Multiple Access) system has been proposed in the Institute of Electrical and Electronic Engineers (IEEE) 802.16 standard committee. According to this IEEE 802.16 Standard, in the OFDMA type communication system, a transmitter transmits a preamble pattern to a receiver, and the receiver acquires the start of a frame, i.e. the frame sync, from the received preamble pattern. This preamble pattern is illustrated in FIGS. 1A and 1B.
FIGS. 1A and 1B are diagrams illustrating the preamble pattern used for an initial sync in a communication system. Specifically, FIG. 1A illustrates a repeated pattern of the preamble pattern, and FIG. 1B illustrates how the preamble pattern is detected.
Referring to FIG. 1A, the preamble pattern 10 has repeated patterns 11, 12 and 13. In any two successive periods of such repeated patterns, the receiver delays a signal of an ‘A’ period, correlates the delay signal of the ‘A’ period with a signal of a ‘B’ period, and then sums the two signals. In this case, if the ‘A’ period signal and the ‘B’ period signal have the same pattern, their summed value becomes a maximum value. Accordingly, if the respective signal period is composed of m samples, 2 m samples must be accumulated. For example, referring to FIG. 1B, the repeated patterns of the preamble pattern are indicated as reference numerals 11 and 12. Specifically, a signal period of “−1 −1 1 1” is obtained by delaying the first signal period 4 of “1 1 1 1” and correlating the delayed first signal period with the second signal period 11 of “−1 −1 1 1”, and then “0” is obtained by summing the obtained signal period. Then, a signal period of “1 1 1 1” is obtained by correlating the second signal period 11 of “−1 −1 1 1” with the third signal period 12 of “−1 −1 1 1”, and “4” is obtained by summing the obtained signal period. Accordingly, if the same signals are repeated, the start point thereof can be found by detecting the signal period by detecting when the summed correlation value becomes a maximum value, and in the same manner, the frame sync can also be extracted.
FIG. 2 is a block diagram of a conventional sync extraction apparatus. Referring to FIG. 2, the conventional sync extraction apparatus includes an delay unit 32, a conjugator 34, a correlator 36, and a Z−2m moving sum unit 38. The delay unit 32 delays an input signal for a period corresponding to m samples. The conjugator 34 conjugates the input signal. The correlator 36 correlates an output signal of the delay unit 32 with an output signal of the conjugator 34, and outputs a correlated signal to the Z−2m moving sum unit 38. Here, the Z−2m moving sum unit 38 sums the correlation values output from the correlator 36, but in this case, the summing should be performed with respect to 2 m samples. As a result, this summing operation causes an increase in of circuit complexity and power consumption.